NanoScope PRV | Anchor Semiconductor

Technology Exposé:
NanoScope PRV (Post-RET Verification)

NanoScope PRV™ is a model-based, pattern-centric full chip Post-RET/OPC verification software solution that features network based computing performance, accurate lithography process modeling, comprehensive hotspot inspection, analysis, and process window limiting pattern extractions.

Armed with Anchor's patented pattern-centric technology, PRV offers features and capabilities that target mask error detection, correction, and data management. The distributed computing architecture produces faster turnaround time for large designs at advanced technology nodes. It runs on generic UNIX / Linux based servers with an option of operating in either batch or GUI mode.

NanoScope PRV also provides comprehensive inspection capability for full process window verification covering all design layers supported by NanoScope Modeler to ensure accurate hotspot detection. Some examples of these inspection functions include:

  • Line width and space CD-based error detection.
  • Break and bridge detection.
  • Hole size and area coverage.
  • Gate CD uniformity assessment.
  • Line-end pull back and end cap length detection.
  • SRAF printability assessment.
  • Side-lobe detection.

Pattern grouping capabilities simplify OPC hotspot review and fix.
Anchor's unique pattern grouping technology is among the key analytical functions proven to be critical in today's chip manufacturing environment that faces increasing hotspot counts and design related defects. Because hotspot review and analysis operations can be time consuming and prone to human error if done manually, pattern grouping becomes a key enabler for hotspot analysis when it is necessary to first reduce the large number of defects by grouping them into fewer and more manageable number of groups.

Anchor currently offers grouping in the categories listed below. All of them can be tailored to handle such issues as pattern resize, jogs, center-shift and error mark shift.

  • Exact pattern grouping. An example of grouping with center-shift is discussed below.
  • Similar pattern grouping (pixel based and topology based).
  • Anchor proprietary pattern signature grouping.
Grouping shift, resize, jog
Exact pattern grouping with center-shift.
pattern group with center-shift has gained popularity for its efficiency and effectiveness. A center-shift radius can be user-defined. The radius is highly dependent on the feature size and affects both the number of groups generated and the number of members in each group.

Edge and jog tolerances.
Two patterns can be grouped together if threshold values of pattern size difference or jog size are defined by the user.
Taking defect coordinate uncertainty into consideration during grouping, each pattern can be shifted within a user-defined distance in either direction to look for exact matches.
Center-Shift Grouping
Pattern grouping results can be viewed in a user-friendly tile view. In this example, 77,929 patterns were consolidated into 11 unique groups, 9 of which are shown here.
Tile View for Pattern Grouping Results
Continuing on the topic of viewing capabilities, NanoScope PRV provides a GUI-based analyzer that allows users to review results through HTML / Browser summary reports. This avoids the need to open separate EDA software and permits more people across the organization to view the results.
GUI-Based Analyzer
Cell Extraction

This example shows that 77,929 defects landed on 26 unique cells.

Pattern hierarchy analysis (cell extraction) can help users identify the hotspot source and assist with the OPC optimization process.
Prediction of Resist Behavior

Accurate prediction of resist behavior in the most sensitive regions.

Through the NanoScope PRV GUI, users can perform Boolean operations, contour simulation, and pattern comparison using the appropriate lithography model validated by wafer SEM image.
Poly Diffusion Bridge
Silicon Confirmation of Poly Diffusion Bridge
In this last example, we see that NanoScope PRV identified a fatal Poly-Diffusion bridging condition. The silicon confirmation is shown in the second graphic.